4 ms·
The 6502 and Z80 were both 'CISCy' chips, but they were very different when it came to instruction execution. While formally a PLA may have been used to "sequen
by zozbot123 8y ago
The 6502 and Z80 were both 'CISCy' chips, but they were very different when it came to instruction execution. While formally a PLA may have been used to "sequence a multiple-clock instruction" in both, in a practical sense 6502 instructions took a handful of clock cycles to execute, not very dissimilar from later RISC chips. I think your point is more valid for the Z80 than for the 6502.
- Taniwha 8y agoyes but RISC at the time was all about throwing that stuff away and executing a single instruction per clock (with an actual pipeline, something those early microprocessors didn't have) the result were much faster CPU's that ran essentially one clock and one instructions per L1 cache cycle, rather than one clock per main memory cycle (and each instruction being many memory cycles) - ie 20-50MHz rather than 1MHz - remember 6502s and their ilk ran unrolled pipelines visible on the main memory bus