(Someone please correct me if I'm wrong) Without adding additional hardware, likely not significant. The way you avoid some of the impacted scenarios (at modes

(Someone please correct me if I'm wrong) Without adding additional hardware, likely not significant. The way you avoid some of the impacted scenarios (at modest performance impact) is with additional hardware or microarchitecture changes. Basically, the task is 'Ensure processor state, as observed by another process, never changes because of speculative execution branches.' Which is a high bar to meet, especially if you want to simultaneously optimize your execution unit utilization.