> Also, there are cheap analog to digital converters which use voltage comparison, which basically linearly "search" for the voltage they should be encoding. I

> Also, there are cheap analog to digital converters which use voltage comparison, which basically linearly "search" for the voltage they should be encoding. Integration type ADCs are not necessarily cheap. And you always put a sample-and-hold circuit in front of integration type ADCs, which completely eliminates the sampling time variance. Also many people are unaware that the Nyquist theorem states, that the _average_ sampling frequency must be at least twice the highest signal frequency. The sampling points may indeed jitter around a little bit, as long as the jitter is distributed evenly. As a matter of fact, adding a little bit of sample jitter can be used as a poor man's dithering, to shift the LSB noise spectrum above the reconstruction filter cutoff frequency. Jitter is mostly a problem with sample clock distribution. Too much jitter and the sample clock no longer arrives with the right delay with respect to the data, which may create large transients, e.g. whenever the numeric value rolls over some power of 2 (a lot of bits change); this problem could be avoided using Gray codes, though. Oh, and then there's Sigma-Delta Modulation.