3 ms·
The tricky thing there would be those aren't just new instructions, they extend existing registers and add new ones. Where do you fit the extra bytes?
by TazeTSchnitzel 8y ago
The tricky thing there would be those aren't just new instructions, they extend existing registers and add new ones. Where do you fit the extra bytes?
- en4bz 8y agoAMD already implements 256bit operations in terms of 2 128bit operations. Seems like going to 4 wouldn't be a stretch, at least for some of the simpler operations. Seems like a subset of operations would be possible.
- bayindirh 8y agoI think Zen2 implements 256 bit instructions natively [0]. For AVX512, the new instructions [1] rather than the floating point arithmetic will be a problem IMHO. Emulating them with the microcode will be expensive and will provide no performance gains. [0]: https://en.wikichip.org/wiki/amd/microarchitectures/zen_2 https://en.wikichip.org/wiki/amd/microarchitectures/zen_2 [1]: https://en.wikipedia.org/wiki/AVX-512 https://en.wikipedia.org/wiki/AVX-512
- TazeTSchnitzel 8y ago> AMD already implements 256bit operations in terms of 2 128bit operations. Current Zen has actual 256-bit registers, it just doesn't have the execution units to process the whole register at once. It's not really the same thing.