3 ms·

I wonder whether it would be possible to add aftermarket AVX-512 instruction handling? Not for performance necessarily, but for compatibility.

ah- 8y ago
Unlikely, IIRC you only had someting in the order of 32 three-instruction slots of memory.
TazeTSchnitzel 8y ago
The tricky thing there would be those aren't just new instructions, they extend existing registers and add new ones. Where do you fit the extra bytes?
- en4bz 8y ago
  AMD already implements 256bit operations in terms of 2 128bit operations. Seems like going to 4 wouldn't be a stretch, at least for some of the simpler operations. Seems like a subset of operations would be possible.
  - bayindirh 8y ago
    I think Zen2 implements 256 bit instructions natively [0]. For AVX512, the new instructions [1] rather than the floating point arithmetic will be a problem IMHO. Emulating them with the microcode will be expensive and will provide no performance gains. [0]: https://en.wikichip.org/wiki/amd/microarchitectures/zen_2 https://en.wikichip.org/wiki/amd/microarchitectures/zen_2 [1]: https://en.wikipedia.org/wiki/AVX-512 https://en.wikipedia.org/wiki/AVX-512
  - TazeTSchnitzel 8y ago
    > AMD already implements 256bit operations in terms of 2 128bit operations. Current Zen has actual 256-bit registers, it just doesn't have the execution units to process the whole register at once. It's not really the same thing.
ip26 8y ago
We have robust support for alternate code paths based on CPU flags after many years of this kind of thing. Is that really necessary or useful? Custom microcode handling is a lot more brittle and chip- specific yet nearly equivalent to overloading in software your call to some avx512 op.
- raverbashing 8y ago
  You're right, it isn't needed The "last time" this was done was in the x87 days, where if the math coprocessor wasn't installed you could trap the corresponding interrupt and handle it to emulate the instructions.
  - bpye 8y ago
    This is done for MIPS FP emulation too - https://www.linux-mips.org/wiki/Floating_point#The_Linux_kernel_and_floating_point https://www.linux-mips.org/wiki/Floating_point#The_Linux_ker...
  - mschuster91 8y ago
    > The "last time" this was done was in the x87 days, where if the math coprocessor wasn't installed you could trap the corresponding interrupt and handle it to emulate the instructions. Wasn't Hackintosh (or getting new OS X running on too old hardware) also using this technology to "support" CPUs without the newest SSEx instruction sets?
rzzzt 8y ago
I guess it would be easier to do that with virtualization. Advertise the capability to the VM, catch illegal instructions, emulate the missing pieces.

ah- 8y ago

Unlikely, IIRC you only had someting in the order of 32 three-instruction slots of memory.

TazeTSchnitzel 8y ago

The tricky thing there would be those aren't just new instructions, they extend existing registers and add new ones. Where do you fit the extra bytes?

en4bz 8y ago
AMD already implements 256bit operations in terms of 2 128bit operations. Seems like going to 4 wouldn't be a stretch, at least for some of the simpler operations. Seems like a subset of operations would be possible.
- bayindirh 8y ago
  I think Zen2 implements 256 bit instructions natively [0]. For AVX512, the new instructions [1] rather than the floating point arithmetic will be a problem IMHO. Emulating them with the microcode will be expensive and will provide no performance gains. [0]: https://en.wikichip.org/wiki/amd/microarchitectures/zen_2 https://en.wikichip.org/wiki/amd/microarchitectures/zen_2 [1]: https://en.wikipedia.org/wiki/AVX-512 https://en.wikipedia.org/wiki/AVX-512
- TazeTSchnitzel 8y ago
  > AMD already implements 256bit operations in terms of 2 128bit operations. Current Zen has actual 256-bit registers, it just doesn't have the execution units to process the whole register at once. It's not really the same thing.

ip26 8y ago

We have robust support for alternate code paths based on CPU flags after many years of this kind of thing. Is that really necessary or useful? Custom microcode handling is a lot more brittle and chip- specific yet nearly equivalent to overloading in software your call to some avx512 op.

raverbashing 8y ago
You're right, it isn't needed The "last time" this was done was in the x87 days, where if the math coprocessor wasn't installed you could trap the corresponding interrupt and handle it to emulate the instructions.
- bpye 8y ago
  This is done for MIPS FP emulation too - https://www.linux-mips.org/wiki/Floating_point#The_Linux_kernel_and_floating_point https://www.linux-mips.org/wiki/Floating_point#The_Linux_ker...
- mschuster91 8y ago
  > The "last time" this was done was in the x87 days, where if the math coprocessor wasn't installed you could trap the corresponding interrupt and handle it to emulate the instructions. Wasn't Hackintosh (or getting new OS X running on too old hardware) also using this technology to "support" CPUs without the newest SSEx instruction sets?

rzzzt 8y ago

I guess it would be easier to do that with virtualization. Advertise the capability to the VM, catch illegal instructions, emulate the missing pieces.