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The problem is the inverse. The problem is that there is not enough parallelism in hardware. Single digit core counts really are not that significantly paralle
by petermcneeley 8y ago
The problem is the inverse. The problem is that there is not enough parallelism in hardware. Single digit core counts really are not that significantly parallel especially when there is a shared main memory bandwidth. An AVX2 code transform will give you more performance than a 8 core hyperthreaded code transform, without all the latency and coordination.
- misnome 8y agoOn the other hand, Intel tried lots of (slightly slower) cores with the Phi series - And part of the reason for dropping/sidelining was that although they are an interesting platform for experiments, nobody could work out how to effectively use that many parallel cores with all of the other constraints, like memory bandwidth.
- petermcneeley 8y agoI highly doubt that the scientific community "could not work out how to effectively use that many parallel core" given that the gaming community effectively used the SPE cores of the PS3. These cores are considerably more difficult to use as they only have small local memory and have strong alignment constraints. If the phi does not have enough bandwidth to service the cores that would simply mean it is not a parallel architecture.