Ah yeah, the higher die count TR's had some interesting performance characteristics, according to Anandtech. One surprising result was that the inter-die commun

Ah yeah, the higher die count TR's had some interesting performance characteristics, according to Anandtech. One surprising result was that the inter-die communication silicon used more power than the cores themselves sometimes, IIRC. I'd probably check out that article, since I'm guessing some of it applies to the similar core-count Epycs.