Delay slots are generally regarded to have been a mistake since they link the ISA to the physical implementation of the processor too closely. That means you en

Delay slots are generally regarded to have been a mistake since they link the ISA to the physical implementation of the processor too closely. That means you end up paying in speed and complexity for architectural choices of past processors in your future processors. RISC-V was designed to be a modern architecture informed by the mistakes of the past.