3 ms·

In my totally non-expert option, no, it will not slow down RISC-V. The RISC-V instruction set family does benefit from the decades of research since MIPS was f

In my totally non-expert option, no, it will not slow down RISC-V. The RISC-V instruction set family does benefit from the decades of research since MIPS was first created. Also, a lot depends on the ecosystem surrounding whatever MIPS cores are available. Memory crossbars, interrupt handling, etc. There's a lot that goes into a system-on-chip.

dbcurtis 8y ago
> The RISC-V instruction set family does benefit from the decades of research since MIPS was first created. Agree. Also, RISC-V has a business model built around open source, it isn't a desperation move, which is what the MIPS move smells like. Also, RISC-V has mind share right now -- implementing RISC-V variations is now homework sets for MIT 6.004. MIPS is day-old bread.