4 ms·

Thanks, they look pretty interesting. Do you know what granularity the ARM tagging supports (e.g. byte level)? Would be interesting to see performance numbers -

• wyldfire 8y ago
  IIRC the ARM tagging would protect ~8 (maybe 16?) byte regions. More info on this is at [1] [2] -- note that some of this discusses a software-only approach (with likely higher performance impact). I think the majority of performance cost for HW Asan will come from the additional bits stored to memory, but it was "modest" (< 5%?). A couple of additional CPU instructions during memory allocate and free, these are probably of negligible impact. [1] https://arxiv.org/abs/1802.09517 https://arxiv.org/abs/1802.09517 [2] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html https://clang.llvm.org/docs/HardwareAssistedAddressSanitizer...