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Can you point me to some resources on this?

• wyldfire 8y ago
  ARM: https://community.arm.com/processors/b/blog/posts/arm-a-profile-architecture-2018-developments-armv85a https://community.arm.com/processors/b/blog/posts/arm-a-prof... RISC-V: https://www.lowrisc.org/docs/tagged-memory-v0.1/tags/ https://www.lowrisc.org/docs/tagged-memory-v0.1/tags/ You can think of this feature like a hardware ASan. Instead of using ASan as a design tool, you could use it as a security feature. Capitalizing on this feature requires compiler and C lib changes. I'd bet that the support should be available in popular open source compilers before ARM ships.
  • anonymousDan 8y ago
    Thanks, they look pretty interesting. Do you know what granularity the ARM tagging supports (e.g. byte level)? Would be interesting to see performance numbers - although I guess the hw is not available yet?
    • wyldfire 8y ago
      IIRC the ARM tagging would protect ~8 (maybe 16?) byte regions. More info on this is at [1] [2] -- note that some of this discusses a software-only approach (with likely higher performance impact). I think the majority of performance cost for HW Asan will come from the additional bits stored to memory, but it was "modest" (< 5%?). A couple of additional CPU instructions during memory allocate and free, these are probably of negligible impact. [1] https://arxiv.org/abs/1802.09517 https://arxiv.org/abs/1802.09517 [2] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html https://clang.llvm.org/docs/HardwareAssistedAddressSanitizer...