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In undergrad and a little bit into grad school, I did some 3DIC research. It was interesting stuff and really exciting to expand architectural design into 3 dim
by noobiemcfoob 8y ago
In undergrad and a little bit into grad school, I did some 3DIC research. It was interesting stuff and really exciting to expand architectural design into 3 dimensions.
The biggest problem was heat as the additional layers trap heat in the chip and make it much easier to let the magic smoke out.
I don't see much in this article explaining any groundbreaking approaches and the diagrams offered look much the same as they did 5 years ago.
- petermcneeley 8y ago"additional layers trap heat in the chip" is this really such a huge problem? Many people immediately conclude that this can just be solved via a convecting fluid.
- AstralStorm 8y agoHope your fluid can circulate in micrometers between sandwiches of silicone. I bet it cannot. Even pure metal solder has limited thermal capacity. Enough that people got mileage from milling down micrometers of chips... The other side becomes less conductive too.
- petermcneeley 8y agoVerging on the dramatically mechanical what about using a low friction ultrathin tape?
- dragonwriter 8y ago> Many people immediately conclude that this can just be solved via a convecting fluid. Many people have physical intuition that treats fluids as inviscid, or at least neglects the effects of scale and viscosity.
- gnode 8y agoAlternatively 3DIC invites power efficient architectures which scale transistors over power per transistor. Such that you might have many more processor cores / stream processors, clocked much slower, at lower voltages. The real problem as I see it, is that producing 3D chips is uneconomical for most cases. You either need to stack dies (expensive), or produce layers of transistors, incurring more lithography / etch / mask steps (slow and expensive). So it mainly makes economical sense in area constrained scenarios.