I'm on the RISC-V J committee (headed by Martin Mass), but what I'm proposing here is unlikely (?) to appeal to the mainstream RISC-V SoC developers, at least n

I'm on the RISC-V J committee (headed by Martin Mass), but what I'm proposing here is unlikely (?) to appeal to the mainstream RISC-V SoC developers, at least not without a strong PoC.