4 ms·
Building a tagged architecture on top of a stock 64-bit system would be much easier than with 32 bits - current systems use 48 bits for addresses, which leaves
by user2994cb 8y ago
Building a tagged architecture on top of a stock 64-bit system would be much easier than with 32 bits - current systems use 48 bits for addresses, which leaves plenty of bits left over for the tag (you could even represent all non-floating point values as 64-bit NaNs and avoid the problems with FP mentioned in the article).
- znpy 8y agoI am not sure, but if my memory serves me right somewhere in the amd64 specification there was something specifically forbidding the use of the uppermost 16 bit to implement tagged pointers, and this is one of the reasons why tagged-pointer-based runtimes haven't been spawning up like mushrooms after the amd64 ISA was implemented.
- user2994cb 8y agoUseful discussion on Stack Overflow: https://stackoverflow.com/questions/16198700/using-the-extra-16-bits-in-64-bit-pointers https://stackoverflow.com/questions/16198700/using-the-extra... Upshot: you can probably get away with it if you are careful to canonicalize pointers before using them.
- znpy 8y agothank you.