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PCIE 4.0 was just standardized last year, it's not surprising that Zen 2 won't support 5.0, which is expected to be introduced mid next year. Zen 2 will be the

PCIE 4.0 was just standardized last year, it's not surprising that Zen 2 won't support 5.0, which is expected to be introduced mid next year. Zen 2 will be the first CPUs supporting 4.0.

shaklee3 8y ago
Power9 was the first to support it over a year ago. But you're right, 5 is not finalized, so it's not possible for amd to support it.
dopenmoredope 8y ago
Release date for PCIe 5.0 is Q1 2019 Furthermore... On June 5th, 2018, the PCI SIG released version 0.7 of the PCIe 5.0 specification to its members. PLDA announced the availability of their XpressRICH5 PCIe 5.0 Controller IP based on draft 0.7 of the PCIe 5.0 specification on the same day https://www.plda.com/products/xpressrich5 https://www.plda.com/products/xpressrich5 and... Historically, the earliest adopters of a new PCIe specification generally begin designing with the Draft 0.5 as they can confidently build up their application logic around the new bandwidth definition and often even start developing for any new protocol features. At the Draft 0.5 stage, however, there is still a strong likelihood of changes in the actual PCIe protocol layer implementation, so designers responsible for developing these blocks internally may be more hesitant to begin work than those using interface IP from external sources. From here: https://en.wikipedia.org/wiki/PCI_Express https://en.wikipedia.org/wiki/PCI_Express AMD had plenty of time to include PCIe 5.0 even in the Draft 0.7 stage which is pretty much the same as final draft/release, but decided not to.
- IntelMiner 8y ago
  Yes. AMD could have simply switched the chip over to non-finalized standards between June 5th and now. Clearly No possible way that could backfire or be impossible
- Tuna-Fish 8y ago
  > AMD had plenty of time to include PCIe 5.0 even in the Draft 0.7 stage which is pretty much the same as final draft/release, but decided not to. ... Just how long do you think it takes to make that kind of design changes? This requires a major change in silicon. It would have had to been done more than a year ago.
  - shaklee3 8y ago
    Not to mention there are no PCIe switches with it. You'd have to wait for Avago/PLX/Broadcom/whatever it's called now to update them.

PCIE 4.0 was just standardized last year, it's not surprising that Zen 2 won't support 5.0, which is expected to be introduced mid next year. Zen 2 will be the first CPUs supporting 4.0.

shaklee3 8y ago

Power9 was the first to support it over a year ago. But you're right, 5 is not finalized, so it's not possible for amd to support it.

dopenmoredope 8y ago

Release date for PCIe 5.0 is Q1 2019 Furthermore... On June 5th, 2018, the PCI SIG released version 0.7 of the PCIe 5.0 specification to its members. PLDA announced the availability of their XpressRICH5 PCIe 5.0 Controller IP based on draft 0.7 of the PCIe 5.0 specification on the same day https://www.plda.com/products/xpressrich5 https://www.plda.com/products/xpressrich5 and... Historically, the earliest adopters of a new PCIe specification generally begin designing with the Draft 0.5 as they can confidently build up their application logic around the new bandwidth definition and often even start developing for any new protocol features. At the Draft 0.5 stage, however, there is still a strong likelihood of changes in the actual PCIe protocol layer implementation, so designers responsible for developing these blocks internally may be more hesitant to begin work than those using interface IP from external sources. From here: https://en.wikipedia.org/wiki/PCI_Express https://en.wikipedia.org/wiki/PCI_Express AMD had plenty of time to include PCIe 5.0 even in the Draft 0.7 stage which is pretty much the same as final draft/release, but decided not to.

IntelMiner 8y ago
Yes. AMD could have simply switched the chip over to non-finalized standards between June 5th and now. Clearly No possible way that could backfire or be impossible
Tuna-Fish 8y ago
> AMD had plenty of time to include PCIe 5.0 even in the Draft 0.7 stage which is pretty much the same as final draft/release, but decided not to. ... Just how long do you think it takes to make that kind of design changes? This requires a major change in silicon. It would have had to been done more than a year ago.
- shaklee3 8y ago
  Not to mention there are no PCIe switches with it. You'd have to wait for Avago/PLX/Broadcom/whatever it's called now to update them.