4 ms·
Physics is another reason. Since things are so small these days, you don't want a large amount of 1s or 0s because the charge will "leak" into neighboring cells
by extrapickles 8y ago
Physics is another reason. Since things are so small these days, you don't want a large amount of 1s or 0s because the charge will "leak" into neighboring cells. In the case of buses, anything other than a nominal 50/50 distribution requires too much power or will confuse the automatic gain control on the RX end of the link.
DDR3&4 is a good example of this where the CPU scrambles[0] what is written to physical memory to get the data closer to 50/50 1s and 0s.
In this case I doubt this is the primary reason though.
[0]: https://web.eecs.umich.edu/~taustin/papers/HPCA17-coldboot.pdf https://web.eecs.umich.edu/~taustin/papers/HPCA17-coldboot.p...
- slededit 8y agoDDR3 doesn't scramble the data bits, and I don't think DDR4 does either. Here's an open source controller - you can see yourself: https://github.com/enjoy-digital/litedram https://github.com/enjoy-digital/litedram