4 ms·

Are you aware of anyone who has recreated the process, except with a large pool of different FPGAs from different manufacturers and running designs on a random

Are you aware of anyone who has recreated the process, except with a large pool of different FPGAs from different manufacturers and running designs on a random one each time? I'd imagine with even a moderate pool (~10?) the variation falls away and you're left with a robust design, although the process will take significantly longer.

dnautics 8y ago
apparently it is not possible because contemporary FPGAs do not give you low-level access to modify the floorplan.
- namibj 8y ago
  They don't force -sign the bitstream. iCE40 is also afaik reversed.
- hoosieree 8y ago
  How low-level do you need? Vivado lets you place individual LUTs where you want, and to some extent dictate the routing.
sevensor 8y ago
At that point, why not use a HDL simulator? I think that would be the best approach anyway. The constraint that the circuit can only rely on behavior that can be described by a HDL is a good thing.
- scrooched_moose 8y ago
  I'm getting well out of my domain here, but I'm wondering if there's some "common non-idealness" in FPGAs to be exploited which isn't accurately captured in simulators. Things like this: > A further five cells appeared to serve no logical purpose at all--there was no route of connections by which they could influence the output. And yet if he disconnected them, the circuit stopped working. > It appears that evolution made use of some physical property of these cells--possibly a capacitive effect or electromagnetic inductance--to influence a signal passing nearby. Somehow, it seized on this subtle effect and incorporated it into the solution. which could be implemented in a more general manner and don't rely on the peculiarities of a single board. It may not prove to be robust, but in a pure research sense I'd love to see it.
  - sevensor 8y ago
    As dnautics alludes in a sibling commment, the effect you're talking about is subtly floorplan dependent, and that's going to vary from manufacturer to manufacturer. I don't think it's completely impossible that there's a common non-idealness to FPGAs, but I also don't think that the common non-idealness is going to involve using disconnected cells as some kind of antenna.

dnautics 8y ago

apparently it is not possible because contemporary FPGAs do not give you low-level access to modify the floorplan.

namibj 8y ago
They don't force -sign the bitstream. iCE40 is also afaik reversed.
hoosieree 8y ago
How low-level do you need? Vivado lets you place individual LUTs where you want, and to some extent dictate the routing.

sevensor 8y ago

At that point, why not use a HDL simulator? I think that would be the best approach anyway. The constraint that the circuit can only rely on behavior that can be described by a HDL is a good thing.

scrooched_moose 8y ago
I'm getting well out of my domain here, but I'm wondering if there's some "common non-idealness" in FPGAs to be exploited which isn't accurately captured in simulators. Things like this: > A further five cells appeared to serve no logical purpose at all--there was no route of connections by which they could influence the output. And yet if he disconnected them, the circuit stopped working. > It appears that evolution made use of some physical property of these cells--possibly a capacitive effect or electromagnetic inductance--to influence a signal passing nearby. Somehow, it seized on this subtle effect and incorporated it into the solution. which could be implemented in a more general manner and don't rely on the peculiarities of a single board. It may not prove to be robust, but in a pure research sense I'd love to see it.
- sevensor 8y ago
  As dnautics alludes in a sibling commment, the effect you're talking about is subtly floorplan dependent, and that's going to vary from manufacturer to manufacturer. I don't think it's completely impossible that there's a common non-idealness to FPGAs, but I also don't think that the common non-idealness is going to involve using disconnected cells as some kind of antenna.