5 ms·
That's really a matter of Intel's 10nm process (which is roughly equivalent to TSMC 7nm). AMD used 128-bit and simulated 256-bit by doing 2 passes. This reduce
by hajile 8y ago
That's really a matter of Intel's 10nm process (which is roughly equivalent to TSMC 7nm).
AMD used 128-bit and simulated 256-bit by doing 2 passes. This reduced peak power consumption and allowed them to keep clock consistently high. That matters because while your AVX is going slowly, your non-AVX is also going slowly. There was simply no way x86 could do vectors that wide on 14nm without throttling.
With the 7nm shift, AMD can use the reduced size to increase to native 256 at full speed (and they may do 512 in 2 parts). I expect Intel to do the same when they get replace their 10nm process with something that works. It'll probably be a couple more shrinks though, before 512 can be run at full-speed.