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Comparing processes between fabs might not make sense, but the real question is — does it still make sense within a single fab? If so, then it's still very much

by pdpi 8y ago

Comparing processes between fabs might not make sense, but the real question is — does it still make sense within a single fab? If so, then it's still very much the case that Intel, for whatever reason, has been stagnant while AMD has been moving forward at a fair pace, which still lends credibility to the narrative that AMD is closing the gap and Intel is losing some of its lead. Of course, as has been the case for decades, it still remains to be seen whether this will translate into AMD taking more of the market.

Skunkleton 8y ago
Is (Transistor Count / Die Size) something that produces a meaningful number?
- pdpi 8y ago
  Not really. E.g. the AMD ZEN+ moved to a 12nm process but kept both transistor count and die size constant. They instead used the headroom to space features out and improve cooling.
  - the8472 8y ago
    You could still specify the maximum possible transistor density for the process. It doesn't mean a concrete design actually has to use it. Or make it an SRAM bit, because caches take up the bulk of the area anyway.
    - blattimwind 8y ago
      Pretty much equivalent to SRAM cell density, which you can measure under a microscope.
    - sevensor 8y ago
      Speaking of SRAM, it's interesting how much effort is devoted to keeping the logic busy so they don't have to spend chip area on cache.
  - monocasa 8y ago
    I think the HDL guys were running around with their hair on fire for Spectre bugs, hence why it was a straight transistor shrink with next to no logic changes. It's previously unheard of to not take advantage of a process shrink with logic changes; so much of your logic decisions are ultimately rooted in the process node.
- gnode 8y ago
  It gives you a bound on the areal density of the transistors, which correlates with their switching and power performance.
- Symmetry 8y ago
  It's a useful number but its not the whole story. Fitting more transistors into a given area lets you put more chips on a wafer which is good economically. And it correlates with performance but, for example, Intel has traditionally accepted more restrictive design rules in exchange for more performant transistors and that has hurt their effective transistor density even if their individual transistors have been fast.

by pdpi 8y ago

Skunkleton 8y ago

Is (Transistor Count / Die Size) something that produces a meaningful number?

pdpi 8y ago
Not really. E.g. the AMD ZEN+ moved to a 12nm process but kept both transistor count and die size constant. They instead used the headroom to space features out and improve cooling.
- the8472 8y ago
  You could still specify the maximum possible transistor density for the process. It doesn't mean a concrete design actually has to use it. Or make it an SRAM bit, because caches take up the bulk of the area anyway.
  - blattimwind 8y ago
    Pretty much equivalent to SRAM cell density, which you can measure under a microscope.
  - sevensor 8y ago
    Speaking of SRAM, it's interesting how much effort is devoted to keeping the logic busy so they don't have to spend chip area on cache.
- monocasa 8y ago
  I think the HDL guys were running around with their hair on fire for Spectre bugs, hence why it was a straight transistor shrink with next to no logic changes. It's previously unheard of to not take advantage of a process shrink with logic changes; so much of your logic decisions are ultimately rooted in the process node.
gnode 8y ago
It gives you a bound on the areal density of the transistors, which correlates with their switching and power performance.
Symmetry 8y ago
It's a useful number but its not the whole story. Fitting more transistors into a given area lets you put more chips on a wafer which is good economically. And it correlates with performance but, for example, Intel has traditionally accepted more restrictive design rules in exchange for more performant transistors and that has hurt their effective transistor density even if their individual transistors have been fast.