4 ms·
no. just no. nobody wants that. Verilog is BEYOND broken and beyond saving. No one in their sane mind would try and implement that piece of abomination called S
by artemonster 8y ago
no. just no. nobody wants that. Verilog is BEYOND broken and beyond saving. No one in their sane mind would try and implement that piece of abomination called SystemVerilog either. This is the reason people are creating new HDLs all the time.
- jacoblambda 8y agoVerilog may be horrible and SystemVerilog may not be perfect (its a hell of a lot better than Verilog though) but there are innumerable projects written in these languages that could benefit from or be a benefit to others if they had better interoperability.