4 ms·
I doubt the improvement comes from icache misses. Rather, the improvement comes from avoiding pipeline flushes by reducing mispredicts, and said mispredict red
by cperciva 8y ago
I doubt the improvement comes from icache misses. Rather, the improvement comes from avoiding pipeline flushes by reducing mispredicts, and said mispredict reduction also reduces icache misses.
- nkurz 8y agoI'm a little doubtful that reduced prediction error can be the main driver here. Hardware branch predictors are really good for anything that's predictable after a short learning period, so layout changes are only going to have an effect on prediction errors for the first couple iterations on a cold start. Can there really be hundreds of billions of cold starts? Maybe, but I suspect that optimizing the straight line code path to match the most common branch is the greater effect, since consecutive instructions are almost always going to be in cache. I'm still surprised the effect is this large, but I think it's a little more likely, and it does match the blog post.