4 ms·
Can anyone who watched the video summarize? I'm interested in the subject, but don't have the time/concentration for long videos when an article often suffices.
by 3rdAccount 8y ago
Can anyone who watched the video summarize? I'm interested in the subject, but don't have the time/concentration for long videos when an article often suffices.
- janco 8y agomy notes: * HardCaml - DSP for FPGA/ASIC, * embedded SW in OCaml (running on Xilinx MicroBlaze), * HardCaml example: AXI interface, GPIO, SPI, cordic, * FPGA: LUTs and regs, BRAM, DSP, skip to 9:40 if you are familiar with FPGA, skip to 17:50 if you know HDLs, go to 37:10 for a demo * HardCaml datatypes: registers, wires (can be used before they are assigned), memory, ... * API: arithmetic, logic, `pipeline`, `reg`, bit selects, `width` --> useful for HW generation, `inst` - use VHDL and Verilog in HardCaml * signed and unsigned types: checks at compilation, * `bits` = non-synthesizable, `signal`= synthesizable, * `Always` ~ Verilog `always` - used mainly for FSM * built-in cycle-accurate simulator: supports multiple process, MicroBlaze simulator (instruction set simulator) * terminal-based waveform viewer and VCD export * formal verification: SAT solvers - boolean function --> SAT/UNSAT * software: Ocaml -> bytecode -> Ocaml interpreter for MB, C-stubs in Ocaml library, no signals, no threads, no Unix * code for HardCaml available on Jane Street GitHub