Not anymore, at least on modern Intel - lea instructions go through the ALU like other ALU instructions. It's still an advantage over mul in this case, because

Not anymore, at least on modern Intel - lea instructions go through the ALU like other ALU instructions. It's still an advantage over mul in this case, because it is a so-called "two component lea" which only has two components (base reg and index reg) so it takes 1 cycle latency and can execute at a throughput of 2 per cycle, versus 3 cycles latency and 1 per cycle for mul.