3 ms·

They're digital electronic signals. They all need to be "perfectly" timed, regardless of whether it's HDMI at 40 gbps or UART at 9600 bps. Moving logic to the m

They're digital electronic signals. They all need to be "perfectly" timed, regardless of whether it's HDMI at 40 gbps or UART at 9600 bps. Moving logic to the monitor doesn't change the laws of physics, the FPGA will still have to time the data signals going over to the monitor. Except, ever notice how much more bandwidth your GPU has access to on the PCIe bus than your monitor does through HDMI? PCIe x16 was pushing 40 gbps (unidirectional only, doubles to 80 gbps for two-way) a decade ago and we only got HDMI2 a few years ago.

rwmj 8y ago
This is not really true. Character based LCDs have data signals which are latched by an external "enable" pin. You can feed the commands and characters in at any speed you want, or at irregular intervals if you like.
- akiselev 8y ago
  That's why I put "perfectly" in quotes. The only way to make a perfectly timed signal is to be precise down to one plank. That's obviously a ridiculous definition because we can't even make any hardware that can differentiate such precise inputs. Perfectly timed in EE means to within operating specs so that the chip does what you want. It's the only definition that makes sense. What you're describing, by the way, is a feature at the MAC level, not the PHY level (think signals vs data frames vs packets). The vast majority of ICs are all push based so they just continue normal operation when there is power but no other inputs. Your example still requires timing your clock/enable signal so that the ringing on data lines settles down before clk/en rises and the data doesn't change before the rising edge is detected.
rbanffy 8y ago
They need to be synced to your clock signal, but there's nothing to prevent the signal source to also generate the clock pulses at any rate it finds convenient or even be irregular. In fact, being irregular removes a lot of EM interference sources. Think of asynchronous CPUs.

rwmj 8y ago

This is not really true. Character based LCDs have data signals which are latched by an external "enable" pin. You can feed the commands and characters in at any speed you want, or at irregular intervals if you like.

akiselev 8y ago
That's why I put "perfectly" in quotes. The only way to make a perfectly timed signal is to be precise down to one plank. That's obviously a ridiculous definition because we can't even make any hardware that can differentiate such precise inputs. Perfectly timed in EE means to within operating specs so that the chip does what you want. It's the only definition that makes sense. What you're describing, by the way, is a feature at the MAC level, not the PHY level (think signals vs data frames vs packets). The vast majority of ICs are all push based so they just continue normal operation when there is power but no other inputs. Your example still requires timing your clock/enable signal so that the ringing on data lines settles down before clk/en rises and the data doesn't change before the rising edge is detected.

rbanffy 8y ago

They need to be synced to your clock signal, but there's nothing to prevent the signal source to also generate the clock pulses at any rate it finds convenient or even be irregular. In fact, being irregular removes a lot of EM interference sources. Think of asynchronous CPUs.