5 ms·

I always thought this was quite elegant; in the original ARM ISA most ALU operations and register moves (and even some load/store indexing) could pass through t

I always thought this was quite elegant; in the original ARM ISA most ALU operations and register moves (and even some load/store indexing) could pass through the barrel shifter at no extra cost, so a 'ROR' was just a move from a register to itself with a pass through the shifter. This made up (somewhat) for the low code density implied by fixed-length instructions and uniform load/store architecture. AArch64 removes this capability from most of the arithmetic operations I believe. The design of the orginal ARM ISA is very interesting historically, mainly informed by many man years of hand-optimising 6502. As such it was quite idiosyncratic, nice to write by hand, and rather awkward for compilers...

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ajross 8y ago
> could pass through the barrel shifter at no extra cost There was always a cost. You had to spend those bits in the instruction encoding that could have been used for more registes, more instructions, more operands, or (the x86 choice) the ability to fit more (smaller) instructions in the instruction cache. The existence of this extra thing in the instruction data path meant you needed an extra cycle or two in the execute pipeline for every instruction, not just the ones with shifts. You also had to have the single-cycle barrel shifter implemented in hardware (this is something that smaller microcontrollers used to skip). In fact that weird ARM shift field is broadly held to have been a mistake. Note that A64 skips it.
- jlarcombe 8y ago
  Well, yeah, run-time cost, I meant. Originally this was nil (unless you had a register-specified shift) on the 'classic' 3-stage pipeline in the original ARM (1/2/3/6/7). As the pipeline got deeper this was more problematic, as you say, and higher frequencies make the silicon implementation awkward too. But even in A64, the barrel shifter is available on the second register operand of the non-arithmetic data processing operations.
cesarb 8y ago
> The design of the orginal ARM ISA is very interesting historically Also very interesting is to see how it was originally implemented (a series of blog posts by Ken Shirriff and Dave Mugridge): https://www.righto.com/search/label/arm https://www.righto.com/search/label/arm and https://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-first-arm.html https://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-...

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ajross 8y ago

> could pass through the barrel shifter at no extra cost There was always a cost. You had to spend those bits in the instruction encoding that could have been used for more registes, more instructions, more operands, or (the x86 choice) the ability to fit more (smaller) instructions in the instruction cache. The existence of this extra thing in the instruction data path meant you needed an extra cycle or two in the execute pipeline for every instruction, not just the ones with shifts. You also had to have the single-cycle barrel shifter implemented in hardware (this is something that smaller microcontrollers used to skip). In fact that weird ARM shift field is broadly held to have been a mistake. Note that A64 skips it.

jlarcombe 8y ago
Well, yeah, run-time cost, I meant. Originally this was nil (unless you had a register-specified shift) on the 'classic' 3-stage pipeline in the original ARM (1/2/3/6/7). As the pipeline got deeper this was more problematic, as you say, and higher frequencies make the silicon implementation awkward too. But even in A64, the barrel shifter is available on the second register operand of the non-arithmetic data processing operations.

cesarb 8y ago

> The design of the orginal ARM ISA is very interesting historically Also very interesting is to see how it was originally implemented (a series of blog posts by Ken Shirriff and Dave Mugridge): https://www.righto.com/search/label/arm https://www.righto.com/search/label/arm and https://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-first-arm.html https://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-...