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What would you propose they do?
by confounded 8y ago
What would you propose they do?
- bubblethink 8y agoLive with the blob, and accept that the certification is quite meaningless if you have to do such gymnastics to get it.
- madez 8y agoI disagree. Requiring it puts pressure on the manufacturers to do it better and be more open.
- snaky 8y agoLoading the blob by M4 core instead of A53 core don't put any pressure on the manufacturers.
- madez 8y agoJust letting another chip do the loading seems to be only part of the solution. The other part is to load it from read-only memory so it cannot be modified after production. That is what I consider to be the crucial property: the firmware must not be updateable.
- snaky 8y ago> the firmware must not be updateable Updatebale firmware With physical switch would be much better solution than completely non-updateable firmware.
- seba_dos1 8y agoYou have two options: - either you give your users an ability to upgrade the firmware, so they can RE it, write and use an open replacement - or you don't give your users an ability to upgrade, which doesn't help anyone since they can never be sure if the chip manufacturer didn't put some undocumented interface somewhere that even you weren't aware of; so now only the chip manufacturer can upgrade the firmware and the user can't Realistically, in a context of mobile phone components, there hardly such thing as "not updatable firmware". You can never be sure.
- snaky 8y ago> so they can RE it, write and use an open replacement Crypting and signing is trivial, so nobody is going to RE Intel ME or microcode updates.
- seba_dos1 8y agoSure, but there are plenty of unsigned firmwares out there that could be replaced, but need to be sealed in order to get RYF certification.
- confounded 8y agoThese are not Purism’s gymnastics; they’re those of the FSF. And I kind of agree with them. If code doesn’t have DMA or network access, I’m pretty happy to treat it like the code in my microwave. There’s firmware blobs in almost everything. I’d prefer them to be FOSS, but we all need to get things done :)
- bubblethink 8y ago>The i.MX 8 has some A53 cores and an M4 core all on the same silicon. The FSF guidance on the co-processor exception is breathing room. I haven't read the fine print on what they mean by co-processor. My conjecture is that it was written at a time before these sort of architectures, and referred more to traditional GPU over pci-e like co-processors so that non-essential stuff can be excluded from requirements. In this case, you have single silicon, and single RAM. RAM needs blob for init. You claim that if you squint, you can see single silicon as multiple processors, and voila RAM init quandry is solved. That is purim's gymnastics.
- snaky 8y agoOne of the funny examples is Raspberry Pi where ARM cores are actually coprocessors.