> ASICs aren't necessarily task specific, you can do whatever you want in an ASIC. I mean, it's stands for "application specific" so it's really just a matter

> ASICs aren't necessarily task specific, you can do whatever you want in an ASIC. I mean, it's stands for "application specific" so it's really just a matter of semantics. > Your unit cost analysis isn't quite right either Yeah I realize now my unit cost analysis is confusing. `++` means "best unit cost" aka "least expensive". I forgot to go into the scale issue more, which is where FPGAs can really come into the equation as a good middle ground between unit cost at scale and development cost.