3 ms·

Also... >On a 1 megapixel image, our unit of work is a single pixel and we have concurrency of 1 million units. Wouldn't that require 1 million input wires in

Also... >On a 1 megapixel image, our unit of work is a single pixel and we have concurrency of 1 million units. Wouldn't that require 1 million input wires into the FPGA? Otherwise, you could use fewer input wires, but the input signals would need to be multiplexed to allow multiple bit streams to transit a single wire - significantly reducing your concurrency.

janekm 8y ago
That's a detail the parent clearly skipped for tldr. On the kind of large (expensive) FPGA you might use for that kind of image you will find what are called deserialisers and serialisers which are hardware blocks that can take a serial bitstream as may come from a camera module or dvi bus and split it up onto your parallel processing streams. The kind of small FPGA as is mentioned in the OT is typically used for "glue logic", that is performing relatively simple logic on multiple pins, often to adapt one hardware protocol (say mipi bus from a camera module) to another (say spi Bus understood by a cheap micro controller).