Disclaimer: I work on Linux at Intel. Future hardware will be mitigated against side-channel issues. There's a nice table showing how things are mitigated on

Disclaimer: I work on Linux at Intel. Future hardware will be mitigated against side-channel issues. There's a nice table showing how things are mitigated on future processors here: https://www.tomshardware.com/news/intel-cascade-lake-details-spectre-meltdown,37674.html https://www.tomshardware.com/news/intel-cascade-lake-details... But, not everything is mitigated in the silicon or microcode. The mitigation for Spectre / Variant 1 / Bounds Check Bypass, for instance, will continue to be in software.