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AMD seems to fare better with the patches. Its good for AMD. I remember when AMD64 came out and AMD had a lead on intel. Its good to have have some competition.
by samfisher83 8y ago
AMD seems to fare better with the patches. Its good for AMD. I remember when AMD64 came out and AMD had a lead on intel. Its good to have have some competition.
- vlovich123 8y agoExcept Intel + mitigations still much faster on most workloads than AMD without mitigations.
- ebikelaw 8y agoYeah I don’t see what AMD has to be glad about here. Their new CPUs are not remotely competitive with Intel on realistic workloads, mainly because their cache and TLB architecture is already poor. Intel had to introduce more TLB misses to fix this, AMD starts with that.
- sounds 8y agoThat's a pretty bold claim to make. I assert that AMD is competitive [1] [2] and is definitely cutting into Intel sales [3] [4]. Even Intel's CEO thinks so [5]. Care to back up your claims with well known, respected, repeatable benchmarks? [1] https://www.anandtech.com/show/11544/intel-skylake-ep-vs-amd-epyc-7000-cpu-battle-of-the-decade https://www.anandtech.com/show/11544/intel-skylake-ep-vs-amd... [2] https://www.anandtech.com/show/12084/epyc-benchmarks-by-intel-our-analysis- https://www.anandtech.com/show/12084/epyc-benchmarks-by-inte... [3] https://www.forbes.com/sites/patrickmoorhead/2018/06/20/how-has-the-amd-epyc-server-processor-done-in-its-first-year/#27ad05602d31 https://www.forbes.com/sites/patrickmoorhead/2018/06/20/how-... [4] https://www.fool.com/investing/2018/05/29/amd-keeps-chipping-away-at-intels-chip-dominance.aspx https://www.fool.com/investing/2018/05/29/amd-keeps-chipping... [5] https://www.cnbc.com/2018/06/11/amd-will-create-stiff-competition-for-intel-next-year-analyst.html https://www.cnbc.com/2018/06/11/amd-will-create-stiff-compet... Even Greg-KH warns about Intel's performance due to these exploits: http://www.eweek.com/security/linux-kernel-developer-criticizes-intel-for-meltdown-spectre-response http://www.eweek.com/security/linux-kernel-developer-critici...
- mda 8y agoThat depends on the test and hardly "much faster"
- zrm 8y agoThis isn't Bulldozer anymore. Intel has faster single thread performance on some workloads, but the difference for "most workloads" is modest and for the same money AMD is offering more cores, more memory channels and more I/O. For threaded (i.e. server) workloads it has been a solid choice even before these mitigations started eating into Intel's single thread performance lead.
- ebikelaw 8y agoA 2-socket AMD setup has the same NUMA topology as an 8-socket Intel machine, and because of that the performance is terrible on many workloads.
- zrm 8y agoThere are a lot of things that have to go the wrong way at once to get to the point where that really matters. The first is that your working set won't fit in the processor caches and has regular cache misses into main memory -- but most of the Epyc line has 64MB of L3 cache. Then the access pattern has to be random rather than sequential, which knocks out a major class of the applications satisfying the first criteria (all the ones that process big files in sequential order). Then the operating system scheduler has to fail to schedule the process on a core in the same node as its data, most commonly because you have a process with more active threads than there are threads per node. What you're left with is, basically, large databases. But large databases also benefit significantly from more cores, memory channels and I/O. Which factor dominates is going to depend on specific usage, e.g. a database with randomly accessed individual bits will be more sensitive to latency whereas one containing pictures or other medium-large blocks of data will be more sensitive to memory bandwidth. You can certainly find a worst-case usage pattern for one or the other but in general they're going to counterbalance each other.
- ebikelaw 8y agoI don't think you really understand the architecture of the machine. EPYC looks on paper like it has a large L3 cache, but it consists of separate L3 caches per "core complex" of which there are two per die and four dies per package. So what you've actually got is a bunch of redundant 8MB caches, which is not the same thing. Because of the baroque topology, especially when you have two sockets, access to main memory varies between almost-as-fast-as-xeon to way-way-slower-than-xeon. Combined with the small caches it's a total disaster.
- michaelmrose 8y agoBenchmarks please with current generation processors and a chips from the same price point.