IMO this will be the final forcing function for silicon photonics. ultimately if you cannot scale on-die you have to scale off-die. plus this takes away any fur

IMO this will be the final forcing function for silicon photonics. ultimately if you cannot scale on-die you have to scale off-die. plus this takes away any further scaling concerns about on/off board components. lastly this will have major implications for processor architecture because memory access latency is quite huge and execution is often stalled for memory access. if you have any doubts about that just look at the amount of area dedicated to caches. AFAIK Intel & luxtera are the two main leaders in silicon photonics so I wouldn't count intel out yet.