The peak performance was predicated on having all four hyper threads issuing multiply accumulate on every open slot. A single thread was incapable of saturatin

The peak performance was predicated on having all four hyper threads issuing multiply accumulate on every open slot. A single thread was incapable of saturating the vector the unit. If your threads were tied down executing excruciating slow scalar operations you couldn't schedule the vector operations you needed. There were also problems with memory latency in the ring bus. It was a great architecture if everything worked out perfectly, but then you could say the same about systolic arrays and other exotica. The GPU model of having every thread execute its own scalar operation in parallel feels like duplicated effort but it ends up working out better in practice for a wider variety of applications. On the Phi they added mask bits to get you closer but it was never really designed to work that way.