3 ms·
Well, yes. This is known as the "race to sleep" and is probably the single most common power saving strategy for modern chips. It's true that switching power s
by kec 8y ago
Well, yes. This is known as the "race to sleep" and is probably the single most common power saving strategy for modern chips.
It's true that switching power scales with the square of voltage (P=V^2Cf), but that's not really a problem for the race to sleep as switching power even with V as low as you can get it is going to be orders of magnitude higher than your static power.
- baybal2 8y agoNo, no, no, there are a lot of situations where you can't sleep the chip. The "race to sleep" is a misconception long held by software people. The situation you describe is only true when the part of the chip doing computation is completely off, and is shunted off from power. That's so called deep sleep. There is a limit to how frequent you can switch the big and complex chip to low power state, as doing so by itself takes some power and computational overhead to keep track of your power use profile. For many cases, one have to endure leakage and keep working, like when you have to do IO have to keep the chip "on" anyways, and want to utilize your "on" time as much as possible. A ton of work have been done on power saving strategies like partial device shutdown, shutting down part of registers, trying to operate different parts of the chip at different frequencies to match io wait and processing time, downshifting to more iterative computational paths, and on and on and on