3 ms·
On something like Skylake, your complicated instructions would execute out of MS-ROM and they would confuse the hell out of the hardware scheduler. Alternativel
by CalChris 8y ago
On something like Skylake, your complicated instructions would execute out of MS-ROM and they would confuse the hell out of the hardware scheduler. Alternatively, you could write simple instructions which would get translated into μops and cached into μop store.
FPGAs are a better and saner approach to user programmed performance acceleration. User microprogramming has never worked. It's a maintenance+security nightmare for everyone.
- bogomipz 8y agoWhat is MS-ROM? I am not familiar with this, is it specific to SKylake?
- CalChris 8y agoThat's Intel's term from the Intel® 64 and IA-32 Architectures Optimization Reference Manual. MS-ROM stands for microcode sequencer ROM. Complicated instructions aren't decoded from x86 into μops. They're read from the MS-ROM (what Fog calls the microcode ROM). They pollute the μop cache. Basically, they support the really complex instructions but that's it. Clearly the ROM is a ROM and read-only and I mistakenly said that user microprograms would be written there. No, they'd be written to a WCS, Writeable Control Store. All that said, the Intels + ARMs of the world would hate this idea. You'd be eeking out a wittle bit of performance at significant support cost. They'd just tell you to buy a faster or another CPU. User programmable WCS was an idea from the 80s. But now, it's a bad idea. If it were a good idea then Microsoft or Google or Amazon would be all over it because they have the capital, the leverage and the need to do it. Yet they don't.