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Processors had these en masse (6502, Z80, MC68000) since the ‘70’s of the past century. Without those, it’s extremely difficult to implement basic arithmetic wi

Processors had these en masse (6502, Z80, MC68000) since the ‘70’s of the past century. Without those, it’s extremely difficult to implement basic arithmetic with numbers larger than what the processor’s registers support. Which contemporary processors don’t have the C and Z status bits? Post scriptum, since “Hacker News” is of the opinion that I’m posting too fast: MIPS does have a status register, and this register does have an overflow bit: https://www.doc.ic.ac.uk/lab/secondyear/spim/node10.html https://www.doc.ic.ac.uk/lab/secondyear/spim/node10.html

saagarjha 8y ago
MIPS? ------------------ Addendum addressing your updates: > MIPS does have a status register, and this register does have an overflow bit: Yes, it does, but it doesn't function as a simple carry or zero bitfield. In MIPS, there are two instructions for performing addition: add and addu. add generates a trap which you can respond to in an exception handler (which is where you check for this exception code)–as opposed to addu, which overflows silently. Most programs explicitly looking to check for overflow just use addu followed by a sltu (set less than, unsigned).
- Annatar 8y ago
  “u” in “addu” means unsigned, so if I’m using it, I understand what the implication is.
  - saagarjha 8y ago
    What implication are you talking about?
    - Annatar 8y ago
      That there is no bit used for the sign, and so I know when the registers will overflow. A lot of the assembler code I wrote exploits this very fact, since when used cleverly it’s a performance optimization.
AstralStorm 8y ago
Unfortunately, the bit has overloaded meaning. Plus you're still injecting expensive branches which the branch slot is unlikely to fix.
- Annatar 8y ago
  You’ll never feel that penalty if you’re writing the assembler code by hand, not even on the oldest, slowest MIPS processor, and if you’re using a compiler, the compiler intrinsic has to do the same thing.

saagarjha 8y ago

MIPS? ------------------ Addendum addressing your updates: > MIPS does have a status register, and this register does have an overflow bit: Yes, it does, but it doesn't function as a simple carry or zero bitfield. In MIPS, there are two instructions for performing addition: add and addu. add generates a trap which you can respond to in an exception handler (which is where you check for this exception code)–as opposed to addu, which overflows silently. Most programs explicitly looking to check for overflow just use addu followed by a sltu (set less than, unsigned).

Annatar 8y ago
“u” in “addu” means unsigned, so if I’m using it, I understand what the implication is.
- saagarjha 8y ago
  What implication are you talking about?
  - Annatar 8y ago
    That there is no bit used for the sign, and so I know when the registers will overflow. A lot of the assembler code I wrote exploits this very fact, since when used cleverly it’s a performance optimization.

AstralStorm 8y ago

Unfortunately, the bit has overloaded meaning. Plus you're still injecting expensive branches which the branch slot is unlikely to fix.

Annatar 8y ago
You’ll never feel that penalty if you’re writing the assembler code by hand, not even on the oldest, slowest MIPS processor, and if you’re using a compiler, the compiler intrinsic has to do the same thing.