We are (well, AMD is) working on it. It's all being done in the open; there are PRs you can follow. You can even help out if you're so inclined. It's not goi

We are (well, AMD is) working on it. It's all being done in the open; there are PRs you can follow. You can even help out if you're so inclined. It's not going to be simple or fast, but it's coming... (I work on XLA, a compiler for TensorFlow, and I've been working closely with AMD on the TF/XLA -> AMDGPU port. My team also works on CUDA support in clang, and we've been reviewing AMD's patches to support HIP in upstream clang.)