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I doubt that programming efficiency is what's holding back FPGA's for general compute. Why ? because we've seen decades of research in this area - so at least
by petra 8y ago
I doubt that programming efficiency is what's holding back FPGA's for general compute.
Why ? because we've seen decades of research in this area - so at least we have some tools(c for fpga isn't ideal, but still...), and a lot of the general mapping between what algorithms should be in FPGA.
And Amazon FPGA's instance exist for over a year.
So in that time, if there worth while services to offer with FPGA's, people would have offered them, or at least started. And sure programming complexity is a barrier. but entrepreneurs and VC's love competitive barriers. So where's all this VC funding going towards this area ? Where are all those startups ?
- seliopou 8y agoI disagree. FPGA design remains a highly-specialized area. Tools such as VivadoHLS, and other high-level synthesis tools, do provide some improvement in productivity though with inherent tradeoffs in design quality. There's been a lot of new hardware construction language popping up recently (e.g., HardCaml--which I happen to use, Chisel, Migen, PyMTL, etc.). They may bring something to the table in the coming years, but that's yet to be determined. HardCaml's pretty great though, IMHO. But then again I'm already biased towards OCaml, and I get to work with its creator!
- amirhirsch 8y agoDisagree. I worked in this space for 15 years and watched CUDA win a market for NVidia that was ripe for the picking by Xilinx or Altera. The culture around hardware design prototyping dominates the FPGA field and all attempts at making it approachable by software development are stunted by the proprietary ecosystem. I also think that high level synthesis is largely misguided since sequential imperative style isn't the correct way to think about FPGAs and also doesn't really address the lack of a good low-level language with an abstraction mechanism, and fundamental need for an operating system for running processes on a reconfigurable computing system.