3 ms·
I would hope not; any reasonable implementation would try to keep as much data on-board or on-chip as possible.
by loser777 8y ago
I would hope not; any reasonable implementation would try to keep as much data on-board or on-chip as possible.
- edhu2017 8y agoEdit: This thread is helpful. https://www.reddit.com/r/MachineLearning/comments/6tyyyt/d_dual_gpu_pcie_lane_bottleneck_for_machine/ https://www.reddit.com/r/MachineLearning/comments/6tyyyt/d_d...
- loser777 8y agoYes, but the bulk of bandwidth should be eaten up by intermediate results rather than the input data e.g., for imagenet, 224x224x3 tensors are tiny compared to the intermediate activations that have to be moved around (and saved during training). Hopefully you would also only copy your model over once.
- edhu2017 8y agoI see, but I think for areas like Reinforcement Learning or sequence models though eGPUs would be significantly slower since you have to constantly shuttle new data into the GPU from your computer.