In general, an infinite stream of page faults is not that uncommon if you mess up the page tables. The IST won't help you there... That's an advantage of the P

In general, an infinite stream of page faults is not that uncommon if you mess up the page tables. The IST won't help you there... That's an advantage of the POWER feature where you can define a small number of (typically very large, but that doesn't have to be the case) linear mappings that bypass the page tables. It's typically used to speed up TLB misses, but you could for example add one for the double fault IST if x86 had a similar thing.