People are already working on that, and there are current reversing projects underway for both Xilinx -7 series chips as well as Lattice ECP-series chips. FPGAs

People are already working on that, and there are current reversing projects underway for both Xilinx -7 series chips as well as Lattice ECP-series chips. FPGAs tend to have long lifespans anyway, and the ICE series seems to have no indication of going away soon. Nobody is standing still here. Besides, I'd argue the biggest problem isn't even reversing the chips, but it's recreating all the useful middleware outside of the chip that will take a long time (e.g. ChipScope alternatives, interactive floorplanners, etc). A lot of this isn't even vendor-specific work, it's just a huge effort. On top of the effort of already writing synthesizers and routing descriptions for VTR...