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Unfortunately, cost of the development boards is in no way the problem blocking wider use and knowledge of FPGAs. FPGA tooling is stuck in the dark ages. FPGA

Unfortunately, cost of the development boards is in no way the problem blocking wider use and knowledge of FPGAs. FPGA tooling is stuck in the dark ages. FPGA pipelines are windows-only, the development environment UIs look like a toddler was given access to VB6, and the licensing is crazy. Lattice semiconductor will give a free licence for iceCube2 to a resident of the USA in less then 24 hours but will deliberate for weeks over giving one to someone in Australia (so you should just lie and say you live at the white house, that's what I did after three weeks of no response to my licence request). Xilinx's free licence for ISE states that by using the free licence you agree to let ISE upload all your FPGA code to them and they get to use it for whatever they want. It actually states directly in the licence that if you don't like that you should install the software and then airgap the computer from the internet forever. Cheeky as hell in my opinion. I installed mine on a virtualbox machine and then removed the virtual network card. The reality is, FPGA manufacture and tooling is stuck where 3d printing was a decade ago, but for slightly different reasons. Designing and manufacturing FPGAs is pretty high investment which is a major barrier to entry for competitors (the same way patents was for 3d printers). Since FPGAs are desirable for many high end tech companies, it's more profitable for Lattice/Xilinx/et al to charge a small number of companies a squillion dollars for high end development boards and commercial software licences than it is for them to lower the barriers of entry and sell to a wider audience. I'd put a lot of support behind an open hardware FPGA design, even if it was rather shitty in performance, cost and/or features to the current top of the line FPGAs.

lnsru 8y ago
Tools are running on Linux at least last 5 years very well. Xilinx as well as Altera. Never heard such ridiculous claim, that ISE with WebTalk enabled sends every piece of code back to Xilinx. And I was intern at Xilinx! You can always seem in WebTalk report what is leaving your computer. You also proposed usable solution for avoiding WebTalk. The problem is that FPGAs will stay niche product and never became mainstream. What will you do as a hobbyist with some Ultrascale+ device? What can’t you do with 50$ SoC that you can do with FPGA in same price range? SDR is cool, for everything else development cycles are just too long or complex peripherals are needed. How many hobbyists can properly route 64 bit wide DDR3 interface?
- ur-whale 8y ago
  Both tools are monstrosities. Xilinx should once and for all decide if they are in the business of selling hardware or selling software. If the latter they're terrible at it and it's painfully obvious that the culture of the shop is not software-centric. [edit] the hobbyist argument doesn't hold water. Software and normal computer manufacturers made the exact same argument in the 70's (why would anyone ever need a computer at home?). If Xilinx opensourced their toolchain - or much better - OpenSourced their protocols, my bet is their chip sale volume would at least double in a year. In particular because folks would choose their H/W to avoid vendor lock-in. My bet is they're so ashamed of the pile of spaghetti code they're peddling to their customer that they just can't OpenSource it for fear of losing face and reputation for ever.
  - chx 8y ago
    > they're so ashamed of the pile of spaghetti code they're peddling to their customer that they just can't OpenSource it for fear of losing face and reputation for ever. LOL no. Everyone knows how this particular sausage is made. It's obvious we are talking of an organically growing decades old codebase. It won't surprise anyone. To be more on topic, ever since I learned of the PicoEVB a few months ago, I am just giddy of the possibilities, it's amazing we finally got a mobile and PCIe connected FPGA. I wasn't even looking for one because I haven't thought it possible. We truly live in the future.
    - 0xcde4c3db 8y ago
      > It's obvious we are talking of an organically growing decades old codebase. It won't surprise anyone. Indeed, I'd be surprised if the current teams even know how to actually set up a working build environment, as opposed to something like "Here's a pile of VM templates, each one from a former subsystem lead who left the company 5-10 years ago, and a how-to document that assumes you're running VMWare Workstation 4.0 on Windows XP. Talk to Joe if you need licenses for anything.".
  - alain94040 8y ago
    The reason Xilinx won't open source their toolchain, I'm guessing, is that it would reveal to their competitors the optimizations they are using to get more speed or density. Benchmarks and business are won on speed and density (how much I can fit on a given part, and how fast it runs). I can't think of many software projects that had active business competitors (taking sales away from them) that went open source. I don't think code quality has anything to do with it.
mechagodzilla 8y ago
Regarding open-source FPGA design, you're in luck! "Project IceStorm" reverse-engineered the Ice40 line of FPGAs from Lattice, and has a fully open-source toolchain for them. They're not super high end chips, but the HX8k line isn't terrible (~7680 LUTs, I believe). That being said, both Xilinx and Intel/Altera have both supported Linux for years, and the free versions of their software basically support all of their chips that don't cost several hundred dollars per chip. The licensing and such is pretty awful if you're a purist about these things, but they are giving you a fully fledged hardware design suite. I think the main issue is that using FPGAs is actually doing hardware design, and most people don't want to do hardware design, they want an automagical way to make their software go faster. FPGAs are a great way to implement digital logic without having to incur the huge capital costs of taping out a chip, not a magical 'go faster' device for a random algorithm.
- Sir_Substance 8y ago
  >Regarding open-source FPGA design, you're in luck! "Project IceStorm" reverse-engineered the Ice40 line of FPGAs from Lattice, and has a fully open-source toolchain for them. I've used it. It's at the "technically doesn't not work" stage. I take my hat off to them for the work already done, but it's night and day between icestorm and, say, arduino studio. In fairness to them, they are fighting an uphill battle reverse engineering the chip, but as much respect as I have for their work, I don't believe there's a long term open source option in there. At some point Lattice will stop making the Ice40 FPGA line. When we reach that point, the icestorm team will have to reverse engineer a new chip, which is pretty close to starting from scratch.
  - aseipp 8y ago
    People are already working on that, and there are current reversing projects underway for both Xilinx -7 series chips as well as Lattice ECP-series chips. FPGAs tend to have long lifespans anyway, and the ICE series seems to have no indication of going away soon. Nobody is standing still here. Besides, I'd argue the biggest problem isn't even reversing the chips, but it's recreating all the useful middleware outside of the chip that will take a long time (e.g. ChipScope alternatives, interactive floorplanners, etc). A lot of this isn't even vendor-specific work, it's just a huge effort. On top of the effort of already writing synthesizers and routing descriptions for VTR...
st26 8y ago
the development environment UIs look like a toddler was given access to VB6 But does anyone really use the GUI? I was always under the impression nobody, including Xilinx, really cared about the GUI because most commercial projects probably did things headless, invoking the toolchain directly. In other words, it wasn't really meant to be a full time development environment like an IDE.
- ur-whale 8y ago
  The toolchain has gotten so gnarly at this point that the only way to build a batch version of it is to launch the GUI, build a project and mine what the toolchain does from the log.
  - tails4e 8y ago
    This is completely false. The toolchain is now tcl driven, and all commands are fully documented in programming guide: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug835-vivado-tcl-commands.pdf https://www.xilinx.com/support/documentation/sw_manuals/xili... Basically: synth_design; place_design; route_design; write_bitstream What could be more straight forward and transparent than that?
- tails4e 8y ago
  You can use it batch or in GUI mode. The vivado gui is very good for design visualisation and interactive feedback, but as it's tcl driven you can run headless for regular builds/ regressions. Personally I use the GUI more often than not.
tails4e 8y ago
When did you last use an FPGA or the tools? Linux is fully supported on all tools from Xilinx (and I'm sure altera). Vivado is an amazing tool, and has a very intuitive UI, with great design visualizations and cross-pobing, ip-integrator, etc (ISE was replaced by it years ago, it more fits the VB6 style you referred to) There are advanced tools like SDK for embedded SW development, HLS for auto C to RTL convrsion, and SDx for automatic HW/SW offload (SDx basically drives Vivado, HLS and SDK under the hood). The FPGA world has moved past the ASIC design world in terms of tool usability, and I speak from the experience of using both toolsets almost daily. Take a look at the latest offerings, I think you'll be pleasantly surprised

lnsru 8y ago

Tools are running on Linux at least last 5 years very well. Xilinx as well as Altera. Never heard such ridiculous claim, that ISE with WebTalk enabled sends every piece of code back to Xilinx. And I was intern at Xilinx! You can always seem in WebTalk report what is leaving your computer. You also proposed usable solution for avoiding WebTalk. The problem is that FPGAs will stay niche product and never became mainstream. What will you do as a hobbyist with some Ultrascale+ device? What can’t you do with 50$ SoC that you can do with FPGA in same price range? SDR is cool, for everything else development cycles are just too long or complex peripherals are needed. How many hobbyists can properly route 64 bit wide DDR3 interface?

ur-whale 8y ago
Both tools are monstrosities. Xilinx should once and for all decide if they are in the business of selling hardware or selling software. If the latter they're terrible at it and it's painfully obvious that the culture of the shop is not software-centric. [edit] the hobbyist argument doesn't hold water. Software and normal computer manufacturers made the exact same argument in the 70's (why would anyone ever need a computer at home?). If Xilinx opensourced their toolchain - or much better - OpenSourced their protocols, my bet is their chip sale volume would at least double in a year. In particular because folks would choose their H/W to avoid vendor lock-in. My bet is they're so ashamed of the pile of spaghetti code they're peddling to their customer that they just can't OpenSource it for fear of losing face and reputation for ever.
- chx 8y ago
  > they're so ashamed of the pile of spaghetti code they're peddling to their customer that they just can't OpenSource it for fear of losing face and reputation for ever. LOL no. Everyone knows how this particular sausage is made. It's obvious we are talking of an organically growing decades old codebase. It won't surprise anyone. To be more on topic, ever since I learned of the PicoEVB a few months ago, I am just giddy of the possibilities, it's amazing we finally got a mobile and PCIe connected FPGA. I wasn't even looking for one because I haven't thought it possible. We truly live in the future.
  - 0xcde4c3db 8y ago
    > It's obvious we are talking of an organically growing decades old codebase. It won't surprise anyone. Indeed, I'd be surprised if the current teams even know how to actually set up a working build environment, as opposed to something like "Here's a pile of VM templates, each one from a former subsystem lead who left the company 5-10 years ago, and a how-to document that assumes you're running VMWare Workstation 4.0 on Windows XP. Talk to Joe if you need licenses for anything.".
- alain94040 8y ago
  The reason Xilinx won't open source their toolchain, I'm guessing, is that it would reveal to their competitors the optimizations they are using to get more speed or density. Benchmarks and business are won on speed and density (how much I can fit on a given part, and how fast it runs). I can't think of many software projects that had active business competitors (taking sales away from them) that went open source. I don't think code quality has anything to do with it.

mechagodzilla 8y ago

Regarding open-source FPGA design, you're in luck! "Project IceStorm" reverse-engineered the Ice40 line of FPGAs from Lattice, and has a fully open-source toolchain for them. They're not super high end chips, but the HX8k line isn't terrible (~7680 LUTs, I believe). That being said, both Xilinx and Intel/Altera have both supported Linux for years, and the free versions of their software basically support all of their chips that don't cost several hundred dollars per chip. The licensing and such is pretty awful if you're a purist about these things, but they are giving you a fully fledged hardware design suite. I think the main issue is that using FPGAs is actually doing hardware design, and most people don't want to do hardware design, they want an automagical way to make their software go faster. FPGAs are a great way to implement digital logic without having to incur the huge capital costs of taping out a chip, not a magical 'go faster' device for a random algorithm.

Sir_Substance 8y ago
>Regarding open-source FPGA design, you're in luck! "Project IceStorm" reverse-engineered the Ice40 line of FPGAs from Lattice, and has a fully open-source toolchain for them. I've used it. It's at the "technically doesn't not work" stage. I take my hat off to them for the work already done, but it's night and day between icestorm and, say, arduino studio. In fairness to them, they are fighting an uphill battle reverse engineering the chip, but as much respect as I have for their work, I don't believe there's a long term open source option in there. At some point Lattice will stop making the Ice40 FPGA line. When we reach that point, the icestorm team will have to reverse engineer a new chip, which is pretty close to starting from scratch.
- aseipp 8y ago
  People are already working on that, and there are current reversing projects underway for both Xilinx -7 series chips as well as Lattice ECP-series chips. FPGAs tend to have long lifespans anyway, and the ICE series seems to have no indication of going away soon. Nobody is standing still here. Besides, I'd argue the biggest problem isn't even reversing the chips, but it's recreating all the useful middleware outside of the chip that will take a long time (e.g. ChipScope alternatives, interactive floorplanners, etc). A lot of this isn't even vendor-specific work, it's just a huge effort. On top of the effort of already writing synthesizers and routing descriptions for VTR...

st26 8y ago

the development environment UIs look like a toddler was given access to VB6 But does anyone really use the GUI? I was always under the impression nobody, including Xilinx, really cared about the GUI because most commercial projects probably did things headless, invoking the toolchain directly. In other words, it wasn't really meant to be a full time development environment like an IDE.

ur-whale 8y ago
The toolchain has gotten so gnarly at this point that the only way to build a batch version of it is to launch the GUI, build a project and mine what the toolchain does from the log.
- tails4e 8y ago
  This is completely false. The toolchain is now tcl driven, and all commands are fully documented in programming guide: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug835-vivado-tcl-commands.pdf https://www.xilinx.com/support/documentation/sw_manuals/xili... Basically: synth_design; place_design; route_design; write_bitstream What could be more straight forward and transparent than that?
tails4e 8y ago
You can use it batch or in GUI mode. The vivado gui is very good for design visualisation and interactive feedback, but as it's tcl driven you can run headless for regular builds/ regressions. Personally I use the GUI more often than not.

tails4e 8y ago

When did you last use an FPGA or the tools? Linux is fully supported on all tools from Xilinx (and I'm sure altera). Vivado is an amazing tool, and has a very intuitive UI, with great design visualizations and cross-pobing, ip-integrator, etc (ISE was replaced by it years ago, it more fits the VB6 style you referred to) There are advanced tools like SDK for embedded SW development, HLS for auto C to RTL convrsion, and SDx for automatic HW/SW offload (SDx basically drives Vivado, HLS and SDK under the hood). The FPGA world has moved past the ASIC design world in terms of tool usability, and I speak from the experience of using both toolsets almost daily. Take a look at the latest offerings, I think you'll be pleasantly surprised