Answering the items for which I have something to contribute: > 1) Would we be in the same boat with RISC-V? If the hardware used the same style of speculativ

Answering the items for which I have something to contribute: > 1) Would we be in the same boat with RISC-V? If the hardware used the same style of speculative execution, without full cleanup when a miss-speculation happens, yes. > 3) Is there anything in the RISC-V spec that makes something like Spectre less likely to happen? Spectre is related to performing speculative execution without fully cleaning up all possible side effects of miss-speculation. Processor architecture spec's typically say nothing about speculative execution, because speculative execution is supposed to be a transparent performance enhancement. It turns out to not be so transparent, but the result is that unless the RISC-V spec. specifically disallowed any speculative execution, ever, a particular hardware implementation could be just as vulnerable. And even if the spec. disallowed speculative execution, there is no way to prevent a particular designer from building it into their CPU hardware design. > 4) Is speculative execution even a goal for RISC-V? It is unlikely the RISC-V spec. has anything to say about speculative execution. It would be up to a particular CPU designer to decide to implement a particular RISC-V chip with speculative execution for performance reasons in their particular design. > Can a reduced instruction set offer optimization opportunities that make speculative execution not worth the risk? A RISC instruction set is often more amenable to speculative execution designs because of its regularity, lack of special cases, and typical adherence to register to register operations with memory accesses only occurring for explicit load/stores. So it is possible that speculative execution for a RISC architecture is a larger performance booster than for a CISC CPU. > Can RISC-V be competitive without it? Given how far Intel has pushed x86, largely by ever more aggressive speculative execution, it is unlikely any CPU design without speculative execution can be competitive on a raw performance basis. Now, a particular RISC-V chip might be "fast enough" without speculative execution for a large majority of tasks most users put their computers to (most CPU's sit around idle waiting for the user to do something 99.9% of the time). But for raw performance needs (video encoding, 3D gaming, etc.) it would likely not be competitive.