Rajit Manohar (also from Caltech) is an expert in design tools for asynchronous hardware, and moved from Cornell to Yale where he runs an asynchronous VLSI desi

Rajit Manohar (also from Caltech) is an expert in design tools for asynchronous hardware, and moved from Cornell to Yale where he runs an asynchronous VLSI design group [0]. I've worked in groups that have shipped a few chips with his tools and AFAIK they're still the best out there. That said it's still more work than building a synchronous chip, but the power savings can be huge. Rajit has a bunch of neat chips published on his site [1]. Surprising to me was that some of the design foundation for hardware actually borrows from CS, leveraging concepts like communicating sequential processes to provide more formal ways of designing asynchronous circuits - a cool melding of fields! [0] http://avlsi.csl.yale.edu/research.php http://avlsi.csl.yale.edu/research.php [1] http://avlsi.csl.yale.edu/chips.php http://avlsi.csl.yale.edu/chips.php