I'll be presenting a talk at the Chennai 9th RISC-V workshop about doing precisely this: a Libre RISC-V SoC. http://libre-riscv.org/shakti/m_class/ http://libre

I'll be presenting a talk at the Chennai 9th RISC-V workshop about doing precisely this: a Libre RISC-V SoC. http://libre-riscv.org/shakti/m_class/ http://libre-riscv.org/shakti/m_class/ and yes, it is indeed as complicated as you describe. Fortunately there are people out there who are not intimidated by the prospects of tackling such large projects, projects which in their own right are licensed by proprietary companies for enormous sums of money. DDR3 costs USD $1m minimum to license a SINGLE-USE controller and PHY. So I tracked down libre-licensed controllers and PHYs libre-riscv.org/shakti/m_class/DDR/ It turns out that there's around two or three libre-licensed controllers, and Symbiotic EDA are happy to do a libre-licensed DDR3 PHY for USD $300k, and to convert it to DDR4 for another $300k. It'll take them a year but that's fine. Then there is SATA and PCIe (which are not going into the Libre RISC-V SoC), by enjoy-digital: https://github.com/enjoy-digital https://github.com/enjoy-digital These are entirely libre-licensed PHYs that have been used in production ASICs. Then there is also a USB3 Pipe implementation: you can see that enjoy-digital wrote a test for it https://github.com/enjoy-digital/daisho_usb3ipcore_test/tree/master/core https://github.com/enjoy-digital/daisho_usb3ipcore_test/tree... RGMII is available... http://libre-riscv.org/shakti/m_class/RGMII/ http://libre-riscv.org/shakti/m_class/RGMII/ Richard Herveille has RGB/TTL (VGA) and that can be connected externally to an SSD2828, SN75LVDS83b or its china clone NT7181, or a TFP410a, or a Chrontel CH7036 or equivalent. https://github.com/RoaLogic/vga_lcd https://github.com/RoaLogic/vga_lcd Interestingly whilst SD/MMC is available as libre-licensed, eMMC is not. So that has to be dealt with. Video processing blocks are available for constructing all sorts of algorithms (without running into hardware-level patent licensing issues, because they're blocks not full algorithms) https://opencores.org/project/video_systems https://opencores.org/project/video_systems 3D is however really tricky, you are absolutely right, so I have a place-holder page here http://libre-riscv.org/shakti/m_class/libre_3d_gpu/ http://libre-riscv.org/shakti/m_class/libre_3d_gpu/ where I'm inviting anyone with expertise to step forward, to collaborate to get something done. And yes, your comment that it's not particularly exciting in academia, and that they totally lack novelty, is spot on! SoCs with 3D and Video on which you and your kids can watch Monster School, FGeeTV, and play Minecraft, RoBlox and Neko Atsume is indeed neither academically exciting nor novel. With the exception of the 3D part, which Jeff Bush kindly resesarched extremely well, in the form of Nyuzi, by replicating the Intel Larrabee Team's paper in which they developed a recursive rasterisation algorithm. https://github.com/jbush001/NyuziProcessor/wiki https://github.com/jbush001/NyuziProcessor/wiki Who the heck are you, anyway, you seem to be quite insightfully well-informed? :)