8 ms·

Sadly it is still very long way to open source laptop. Remember, processor or SoC contains not only RISC-V core, but also many peripherals. Some peripherals are

• phire 8y ago
  I think a bigger issue is patents. Designing a decent CPUs without violating any patents is easy. Almost all CPUs today follow design patterns which were established back in the mid 80s and early 90s. All those original patents have now expired and you can sidestep around the newer ones. Things like GPUs have evolved massively since the late 90s, gaining support for pixel shaders, vertex shaders, moving to unified core designs, gpu compute and establishing new threading models. And all these things have bled back into the Graphics standards. It would be really hard to design a gpu implementing even a 10 year old standard like OpenGL ES 2.0 without violating any patents. And it will be even worse with things like pci-e, ddr and networking controllers. You can't design around the patents without breaking compatibility because there are standards enforcing you to follow the patents.
  • dvfjsdhgfv 8y ago
    > You can't design around the patents without breaking compatibility because there are standards enforcing you to follow the patents. We could finally learn from this lesson and not support in any way any standards whose implementations require patent licensing.
  • madez 8y ago
    We do not have to follow the standards that prevent open source solutions. If the price for having an open source computer is old technology or "nonstandard" solutions, then I'm more than happy to pay it.
    • sicelo 8y ago
      +1
  • mjevans 8y ago
    An extremely basic (but power efficient) framebuffer would probably be enough. At least with that and some less encumbered output stack (maybe display port?) real and secure foundations could be made for truly verifiable voting assistance systems. It should produce a voter readable paper ballot that is the /actual/ poll and include a 'quick count estimate' for the next morning reports.
    • lkcl 8y ago
      https://github.com/RoaLogic/vga_lcd https://github.com/RoaLogic/vga_lcd richard herveille created one 16 years ago which can do the job. it's silicon-proven: ICubeCorp put it into their IC3128.
    • Doxin 8y ago
      So this theoretical voting machine, how does it differ from an expensive pencil combined with a scantron-style form?
  • exikyut 8y ago
    Okay, so let's just get on with starting at an incredibly basic level then! Consider the Ericsson MC218 / Psion Series 5 (https://www.google.com/search?q=psion+series+5 https://www.google.com/search?q=psion+series+5). The software (EPOC, forerunner to Symbian) could drag windows (whole windows) around the little screen faster than the LCD crystals could keep up/redraw. I had a look inside the unit (find the photos at https://www.applefritter.com/content/pocketable-ultra-low-powered-device-linux-andor-wi-fi https://www.applefritter.com/content/pocketable-ultra-low-po...) and found only a 36MHz ARM7TDMI inside. Presumably the CPU was doing the window redrawing all in software. It's really reassuring to me that such a slow CPU gave the LCD a run fo its money, because let's face it, doing $tons_of_pixel_manipulations on a CPU always chews power, so if you want battery life you're going to need something that works well at the low-power end of the spectrum. (The Series 5's monochrome LCD was 640x240.) So, well-designed software would meet the power consumption-versus-feature challenge halfway. Such software doesn't exist yet though, and it appears this status quo isn't going to change anytime soon; the (financial) investment required just doesn't seem to be materializing. I'd say the main problem is market effects, and consumer interest. "Yeah 70% of CPU time goes to drawing the screen" is NOT particularly attractive.
    • lkcl 8y ago
      usually in these cases where the CPU is so slow, it simply doesn't have the bus bandwidth even to feed an LCD. so the LCD is an SPI device or 8080 MCU compatible memory-mapped peripheral, that has its own internal SRAM as a framebuffer. a good example is the HX8357D (now obsolete sadly) https://github.com/torvalds/linux/blob/master/drivers/video/backlight/hx8357.c https://github.com/torvalds/linux/blob/master/drivers/video/... technically speaking it's perfectly possible to use an 8mhz 8-bit arduino-style processor to make a phone, if all you want is calls and SMS! the processor inside the actual GSM/3G modem is far, far more powerful than that. i added up the number of actual processors in a smartphone once: it was insane. DSP in the Audio IC. ARM core in the GPS. ARM core in the 3G Modem. ARM core in the main processor. 8051 core in the capacitive touchpanel controller. the list just goes on and on!
      • exikyut 8y ago
  • 3pt14159 8y ago
    We could just license the patents though, right? They have to license them for a fair price by law, so I don't see how this stops an open source computer. It's not like we're getting the gold wafers for free.
    • kevin_thibedeau 8y ago
      > They have to license them for a fair price by law What law would that be? A patent holder can set whatever terms they want. Standards orgs try to impose FRAND for their contributors but it is not legally binding.
      • 3pt14159 8y ago
        It's what my patent lawyer explained to me, but I may have misunderstood him. The impression he gave me was that if someone patented something super useful they couldn't simply ask for a trillion dollars to stop their competitors from using it.
• mtgx 8y ago
  > processor or SoC contains not only RISC-V core I don't think most RISC-V cores are open source either. Remember it's not the CPU that is open source by default but the instruction set architecture. I only know of lowRISC developing open source CPUs. Not sure if SiFive's cores are also fully open source. https://www.lowrisc.org/ https://www.lowrisc.org/ https://www.sifive.com/ https://www.sifive.com/
  • rwmj 8y ago
    SiFive's cores are Rocket, which is open source. lowRISC is based on Rocket too. SiFive include proprietary IP for DDR4, ethernet PHY and other things, although I'm pretty sure they'd jump at the chance to replace those bits with open source equivalents if they existed. As for your claim "I don't think most RISC-V cores are open source" it depends how you define "most", but it's a complicated picture. There are competitive open source cores (Rocket for in-order, BOOM for OoO, Pulpino, PicoRV32). There are also several completely proprietary designs, as there should be, such as Western Digital's two different 32 bit RV32 core designs which we expect will ship a billion units next year.
    • makomk 8y ago
      As far as I can tell, SiFive refuse to say what open source code (if any) their commercial cores such as the E31 are based on, or what changes they've made to it if it is based on open source code. See https://forums.sifive.com/t/more-details-for-e31-core/1165 https://forums.sifive.com/t/more-details-for-e31-core/1165 Basically, it's a proprietary blob which you don't know the internals of just like ARM. They've confirmed that U54 and some of their FPGA-only cores are based on Rocket, but those aren't the cores they're offering commercially.
• pjc50 8y ago
  > who will deliver these as open source implementations. And who's going to pay for this, given that (until production runs are huge) every unit is going to be more expensive for less features than a comparable "closed source" unit? If there really was a deep market for this that was also prepared to accept compromises along the way, it could be kickstartered into action. I don't believe there is, just a small but vocal minority on message boards.
• Nokinside 8y ago
  RISC-V is open instruction set, not open microarchitecture. You won't see high performance open source micrarchitectures that implements RISC-V core. Nobody is going to invest $300-$500M to develop new competitive open source microarchitecture (patent free?) every 5-10 years for RISC-V that can compete with Intel, AMD and others.
  • nickik 8y ago
    > You won't see high performance open source micrarchitectures that implements RISC-V core. You don't have to spend $300-$500 to get to a reasonable performance. There are multiple people who are interested in this. The EU and India have processor initiatives (including high perf) that will use RISC-V. Many universities, non-profits, companies will continue to work on the current open-source chips and combined with open source. Of course it will take time but blanked 'You won't see high performance open source micro-architectures' is just an assumption.
    • Nokinside 8y ago
      Yes you have. It's completely different to design small volume ASIC chip with RISC-V processor and high volume microprosessor core that is cost effective. Processor initiative in EU and India have are providing R&D money for basic research and competence building for local companies. They will be customers, not manufacturers.
      • nickik 8y ago
        The EU and India will both build actual chips and those can be tapped out. They will also of course consume their own stuff. There are startups like Esperanto and many university groups and open source who are all interested. Of course you still need to find costumers for a mass tapeout, but once the whole linux tool-chain is running there are lots of potential applications and costumers.
  • ant6n 8y ago
    That's like saying u won't see a general purpose, high performance, highly reliable open source operating system for servers and consumers, with a total development cost of more than a billion in terms of total person hours. Yet here we are.
• ksec 8y ago
  From a security perspective, Apart from networking, I have no problem with an non open source memory controller, PCI-E, etc. Then we can have routers, and other pieces of Internet appliance running on OpenBsD with these tiny SoC.
• rwmj 8y ago
  ARM are not worried that RISC-V will replace Cortex-A72. They license far more (by quantity and value) of the tiny Cortex-M embedded cores, and RISC-V can already replace just about every use of Cortex-M. The foolishness of this website was ARM telling everyone that RISC-V is a viable alternative. It could only have been worse if they'd provided a link to https://github.com/freechipsproject/rocket-chip https://github.com/freechipsproject/rocket-chip
  • TomVDB 8y ago
    Do you by any chance have concrete data or a source for the “by quantity and value” ? I don’t doubt at all that it’s true, but I’d love to understand better what ARM’s exposure really is.
    • rwmj 8y ago
      I don't have figures for revenue, but ARM break out their volumes by Cortex line here, see the first KPI spreadsheet: https://www.arm.com/company/investors/financial-results https://www.arm.com/company/investors/financial-results
      • TomVDB 8y ago
        Summary units breakdown: Classic ARM (7,9,11): 16% Cortex-A: 19% Cortex-R: 7% Cortex-M: 58% Of course, there is probably a large difference in licensing and royalty cost between the A series and the M series. Based on the numbers above, it wouldn’t surprise me if the A series results in higher revenue than the M.
        • rwmj 8y ago
          Oh sure, but I still wouldn't feel happy telling my shareholders that circa 75% of my product volume could disappear. And if that happened it would necessarily leave Cortex-A vulnerable (the Innovator's Dilemma in action).
• lkcl 8y ago
  I'll be presenting a talk at the Chennai 9th RISC-V workshop about doing precisely this: a Libre RISC-V SoC. http://libre-riscv.org/shakti/m_class/ http://libre-riscv.org/shakti/m_class/ and yes, it is indeed as complicated as you describe. Fortunately there are people out there who are not intimidated by the prospects of tackling such large projects, projects which in their own right are licensed by proprietary companies for enormous sums of money. DDR3 costs USD $1m minimum to license a SINGLE-USE controller and PHY. So I tracked down libre-licensed controllers and PHYs libre-riscv.org/shakti/m_class/DDR/ It turns out that there's around two or three libre-licensed controllers, and Symbiotic EDA are happy to do a libre-licensed DDR3 PHY for USD $300k, and to convert it to DDR4 for another $300k. It'll take them a year but that's fine. Then there is SATA and PCIe (which are not going into the Libre RISC-V SoC), by enjoy-digital: https://github.com/enjoy-digital https://github.com/enjoy-digital These are entirely libre-licensed PHYs that have been used in production ASICs. Then there is also a USB3 Pipe implementation: you can see that enjoy-digital wrote a test for it https://github.com/enjoy-digital/daisho_usb3ipcore_test/tree/master/core https://github.com/enjoy-digital/daisho_usb3ipcore_test/tree... RGMII is available... http://libre-riscv.org/shakti/m_class/RGMII/ http://libre-riscv.org/shakti/m_class/RGMII/ Richard Herveille has RGB/TTL (VGA) and that can be connected externally to an SSD2828, SN75LVDS83b or its china clone NT7181, or a TFP410a, or a Chrontel CH7036 or equivalent. https://github.com/RoaLogic/vga_lcd https://github.com/RoaLogic/vga_lcd Interestingly whilst SD/MMC is available as libre-licensed, eMMC is not. So that has to be dealt with. Video processing blocks are available for constructing all sorts of algorithms (without running into hardware-level patent licensing issues, because they're blocks not full algorithms) https://opencores.org/project/video_systems https://opencores.org/project/video_systems 3D is however really tricky, you are absolutely right, so I have a place-holder page here http://libre-riscv.org/shakti/m_class/libre_3d_gpu/ http://libre-riscv.org/shakti/m_class/libre_3d_gpu/ where I'm inviting anyone with expertise to step forward, to collaborate to get something done. And yes, your comment that it's not particularly exciting in academia, and that they totally lack novelty, is spot on! SoCs with 3D and Video on which you and your kids can watch Monster School, FGeeTV, and play Minecraft, RoBlox and Neko Atsume is indeed neither academically exciting nor novel. With the exception of the 3D part, which Jeff Bush kindly resesarched extremely well, in the form of Nyuzi, by replicating the Intel Larrabee Team's paper in which they developed a recursive rasterisation algorithm. https://github.com/jbush001/NyuziProcessor/wiki https://github.com/jbush001/NyuziProcessor/wiki Who the heck are you, anyway, you seem to be quite insightfully well-informed? :)