To expand: compiling silicon isn't like compiling code even though it does use a hardware description language. Not only do all parts of your "code" all run at

To expand: compiling silicon isn't like compiling code even though it does use a hardware description language. Not only do all parts of your "code" all run at once, but you're also laying out physical transistors and mapping their connections. This is fundamentally an NP complete traveling salesman problem with an absurd exponential explosion of complexity - aka how do you route thousands or millions of connections that can't intersect on a 2D plane while still doing what the code describes. Oh and the fun part: unless you're careful, a change in a completely unrelated bit of code could break almost anything in the system by making it impossible to route connections without screwing up the timing of all the little bits. There is no type checker that can deduce whether your design will work or not and then output machine language. At the end of the day, with silicon you have to actually figure out whether your design can be physically manufactured by running a long compiler process and then testing it, often with rigorous simulations before moving to the fab process.