Today a single core of a CPU can read or write about 100 GByte/sec, about 4x more than the bandwidth of a single DRAM module At least for x64 systems, I'm almo

Today a single core of a CPU can read or write about 100 GByte/sec, about 4x more than the bandwidth of a single DRAM module At least for x64 systems, I'm almost sure this is wrong. I think your linked image on zsmith.co must be for multiple cores, and probably for multiple sockets. On all other tests I've seen and run, single threaded memory bandwidth is much less than full system bandwidth. Here's a fully labeled chart showing results more like I'd expect: https://www.anandtech.com/show/11544/intel-skylake-ep-vs-amd-epyc-7000-cpu-battle-of-the-decade/12 https://www.anandtech.com/show/11544/intel-skylake-ep-vs-amd... In this chart, a single core of an Intel "Broadwell-EP" Xeon E5-2699v4 (bigger sibling to the core you link) only gets 18GB/s, while 8 cores on the same socket max out at 60GB/s. Only for the whole machine (with two sockets and thus two memory controllers) are throughputs higher than 100GB/s seen. In practice, the limiting factor is the number of outstanding read requests supported per core. In accordance with Little's Law, you need about 100 requests in flight to overcome the latency of a read from RAM. On Intel, each core can only keep track of 10 outstanding requests. Prefetch can effectively double this, but you still need 4-6 cores to saturate a modern memory bus. See here for more details: http://sites.utexas.edu/jdm4372/2016/11/22/sc16-invited-talk-memory-bandwidth-and-system-balance-in-hpc-systems/ http://sites.utexas.edu/jdm4372/2016/11/22/sc16-invited-talk... If instead it's my understanding that's wrong here, I would love to be corrected!