I'm not a EE but four transistors for a D-FF is hard to beat. Z-80 other contemporaries also used dual phase clocks. Obviously the downsides outweighed the tr

I'm not a EE but four transistors for a D-FF is hard to beat. Z-80 other contemporaries also used dual phase clocks. Obviously the downsides outweighed the transistor overhead eventually. There was a "modern" instantiation of this by Intrinsity (got acquired by Apple) whose "FAST-14" [1] dynamic logic used a four-phase clock. That was pretty cool and they had some (for the time) insanely fast products. I wonder if that logic style would have been feasible in the 6502's time frame. [1] https://en.wikichip.org/wiki/intrinsity/fast14 https://en.wikichip.org/wiki/intrinsity/fast14