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Of course not. RISC-V is open instruction set, not open microarchitecture. There will be some totally open RISC-V microarchitectures, but they are not competi

Of course not. RISC-V is open instruction set, not open microarchitecture. There will be some totally open RISC-V microarchitectures, but they are not competitive with commercial ones. Maybe some verified and intentonally very simple designs for security applications. I would like to be proven wrong, so if there is some IC experts who can explain the business case where someone invests $300-$500M to develop new top notch open source microarchitecture (patent free?) every 5-10 years that can compete with Intel, AMD and others, I would like to see it.

detaro 8y ago
That's not the openness this article talks about
- Nokinside 8y ago
  My point is that entirely open source has never been viable option outside some very limited uses. Coreboot is just different corner of "Not entirely open source".
- rwmj 8y ago
  It (sort of) is. The issue is that SiFive bought some proprietary DDR IP, because DDR RAM is really complex to control. The DDR IP comes with proprietary software to configure it and that can't be redistributed. (Apparently there is a table of constants that are programmed into the hardware which is Super Secret! - as if no one can use a disassembler) Make all the hardware and software bits needed to control DDR RAM under a free license and loads of people will be very happy to use it. (BTW I'm now interested in how the Talos board initializes its DDR RAM)
  - dragontamer 8y ago
    IBM seems to be all in on this "OpenPower" concept. https://github.com/open-power/docs/blob/master/hostboot/HostBoot_PG.md https://github.com/open-power/docs/blob/master/hostboot/Host... So it seems like the Power8 initialization process is simply open source, thanks to IBM.
    - rwmj 8y ago
      Have IBM released open DRAM initialization hardware, and if so under what precise license and where's the Verilog for it? As far as I know, OpenPOWER hardware is not open source in anything like the same way as RISC-V's Rocket and BOOM cores.
mistrial9 8y ago
adding money to the considerations in the heavy-handed way (above) is a common rhetorical way to close discussion on the topic as if there is no other 'realistic' option.
dragontamer 8y ago
> I would like to be proven wrong, so if there is some IC experts who can explain the business case where someone invests $300-$500M to develop new top notch open source microarchitecture (patent free?) every 5-10 years that can compete with Intel, AMD and others, I would like to see it. To develop an open-motherboard marketplace where code can be shared openly between motherboard designers. Or maybe even "daughterboard" features. You know, like OpenPower / Power9. Where additional boot-level capabilities (ie: OpenBMC) are open source and standardized and documented. https://openpowerfoundation.org/presentations/openbmc-a-reference-firmware-stack/ https://openpowerfoundation.org/presentations/openbmc-a-refe... ------------- A practical use of this, is to have the BMCs of servers report status (IE: power, temperature, etc. etc.) in a secure, open, and extendable way. BMCs also have the ability to act as a remote terminal, such as a serial-over-ethernet port. These sorts of features have security concerns that Open Source / openly-vetted code would at least make some people feel better. We're talking about a component that has the ability to remotely reboot, remotely attach keyboards / mice, and virtual terminals at the hardware level. So yeah, security is pretty important. ------------------ Consider this article as why people want Coreboot / Open Source boots: https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port-offer.php https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port... If you can't trust the bootup procedure of your computer, then you can't trust the computer at all!
- sweden 8y ago
  All of what you describe are not done, or guaranteed, by RISC-V. RISC-V only refers to the CPU cores, the same way Arm refers to the CPUs as well. Actually, Arm cores don't force any kind of proprietary board architectures or binary blobs in order to be manufactured and shipped. Why do people expect that this will change with RISC-V?
  - dragontamer 8y ago
    And that's all this article is bringing attention to. Some people care about open-source, and they care quite strongly. I'm not necessarily part of open-boot or coreboot... but I at least understand their sentiment. For these OSS advocates, they really believe in controlling the full computer with fully open source hardware. They feel like calling RISC-V an "Open Source" core dillutes the term. At the end of the day, its just a blogpost on a popular OSS benchmarking website dedicated to the server market. RISC-V doesn't serve their purposes (yet), so that's all they're writing about. 99% of the Phoronix content is about Linux Benchmarks btw. So its not like they publish these internet politics issues too often.
rbanffy 8y ago
> I would like to be proven wrong, so if there is some IC experts who can explain the business case where someone invests $300-$500M to develop new top notch open source microarchitecture (patent free?) every 5-10 years that can compete with Intel, AMD and others, I would like to see it. It really depends on your business. If you are a foundry, it makes a lot of sense to commoditize everything that's complementary (the chip design, for instance) to your business (making the wafers, cutting, testing, encapsulating). Much like a lot of chip makers provide free reference designs you can use.
chrsw 8y ago
You're going to need a lot more than half a billion dollars and 5 years to create processors that can compete with the single thread cost/performance of Intel or AMD chips. I don't believe that's what people who are getting into the RISC-V game are necessarily aiming for anyway.

detaro 8y ago

That's not the openness this article talks about

Nokinside 8y ago
My point is that entirely open source has never been viable option outside some very limited uses. Coreboot is just different corner of "Not entirely open source".
rwmj 8y ago
It (sort of) is. The issue is that SiFive bought some proprietary DDR IP, because DDR RAM is really complex to control. The DDR IP comes with proprietary software to configure it and that can't be redistributed. (Apparently there is a table of constants that are programmed into the hardware which is Super Secret! - as if no one can use a disassembler) Make all the hardware and software bits needed to control DDR RAM under a free license and loads of people will be very happy to use it. (BTW I'm now interested in how the Talos board initializes its DDR RAM)
- dragontamer 8y ago
  IBM seems to be all in on this "OpenPower" concept. https://github.com/open-power/docs/blob/master/hostboot/HostBoot_PG.md https://github.com/open-power/docs/blob/master/hostboot/Host... So it seems like the Power8 initialization process is simply open source, thanks to IBM.
  - rwmj 8y ago
    Have IBM released open DRAM initialization hardware, and if so under what precise license and where's the Verilog for it? As far as I know, OpenPOWER hardware is not open source in anything like the same way as RISC-V's Rocket and BOOM cores.

mistrial9 8y ago

adding money to the considerations in the heavy-handed way (above) is a common rhetorical way to close discussion on the topic as if there is no other 'realistic' option.

dragontamer 8y ago

> I would like to be proven wrong, so if there is some IC experts who can explain the business case where someone invests $300-$500M to develop new top notch open source microarchitecture (patent free?) every 5-10 years that can compete with Intel, AMD and others, I would like to see it. To develop an open-motherboard marketplace where code can be shared openly between motherboard designers. Or maybe even "daughterboard" features. You know, like OpenPower / Power9. Where additional boot-level capabilities (ie: OpenBMC) are open source and standardized and documented. https://openpowerfoundation.org/presentations/openbmc-a-reference-firmware-stack/ https://openpowerfoundation.org/presentations/openbmc-a-refe... ------------- A practical use of this, is to have the BMCs of servers report status (IE: power, temperature, etc. etc.) in a secure, open, and extendable way. BMCs also have the ability to act as a remote terminal, such as a serial-over-ethernet port. These sorts of features have security concerns that Open Source / openly-vetted code would at least make some people feel better. We're talking about a component that has the ability to remotely reboot, remotely attach keyboards / mice, and virtual terminals at the hardware level. So yeah, security is pretty important. ------------------ Consider this article as why people want Coreboot / Open Source boots: https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port-offer.php https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port... If you can't trust the bootup procedure of your computer, then you can't trust the computer at all!

sweden 8y ago
All of what you describe are not done, or guaranteed, by RISC-V. RISC-V only refers to the CPU cores, the same way Arm refers to the CPUs as well. Actually, Arm cores don't force any kind of proprietary board architectures or binary blobs in order to be manufactured and shipped. Why do people expect that this will change with RISC-V?
- dragontamer 8y ago
  And that's all this article is bringing attention to. Some people care about open-source, and they care quite strongly. I'm not necessarily part of open-boot or coreboot... but I at least understand their sentiment. For these OSS advocates, they really believe in controlling the full computer with fully open source hardware. They feel like calling RISC-V an "Open Source" core dillutes the term. At the end of the day, its just a blogpost on a popular OSS benchmarking website dedicated to the server market. RISC-V doesn't serve their purposes (yet), so that's all they're writing about. 99% of the Phoronix content is about Linux Benchmarks btw. So its not like they publish these internet politics issues too often.

rbanffy 8y ago

chrsw 8y ago

You're going to need a lot more than half a billion dollars and 5 years to create processors that can compete with the single thread cost/performance of Intel or AMD chips. I don't believe that's what people who are getting into the RISC-V game are necessarily aiming for anyway.