I remember talking with somebody from a startup sometime in ‘99 to work on something like that. These massive number of little cores were supposed to be the ne

I remember talking with somebody from a startup sometime in ‘99 to work on something like that. These massive number of little cores were supposed to be the next evolutionary step going from customer transistors to standard cells to ... When I asked about power consumption the answer was that this was one of the remaining problems, but it would eventually works itself out. It’s still one of the biggest problems, but it has only gotten worse. Most companies would love to see their competitor adopt an architecture like that. :-) The only place where it might find a place is as an FPGA alternative, but since FPGAs are one or two orders of magnitude less efficient then ASICs, that’s really not a high bar to clear.